Professor Jin-Hong Park's research team at Sungkyunkwan University (President Yoo Ji-Beom), in collaboration with Professor Ji-Hwan Kim’s team at MIT and Dr. Sang-Won Kim’s team at the Samsung Advanced Institute of Technology (SAIT), has developed a 3D C-FET** semiconductor device technology based on single-crystal 2D semiconductor* channels, targeted for sub-10-angstrom (1 nanometer) technology nodes. Following their publication last year in Nature, which introduced a novel method for growing single-crystal 2D materials using a non-epitaxial approach, the team has now unveiled a new 3D C-FET semiconductor device technology. This latest advancement overcomes the integration density limitations of conventional 2D planar semiconductors through a low-temperature integration process. Both technologies are based on next-generation 2D semiconductors and are being recognized as a groundbreaking leap forward in foundry semiconductor integration technology.

  * 2D Semiconductor: A two-dimensional semiconductor material with an atomically thin structure. Due to its exceptional electrical properties and ultra-thin design, it is particularly advantageous for realizing high-performance and high-density integrated devices at sub-1-nanometer scales.

 ** 3D C-FET: A transistor structure where n-FET and p-FET are electrically connected in a three-dimensional stacked configuration. This technology significantly enhances integration density and power efficiency compared to conventional 2D planar devices. It is anticipated to be a key technology for sub-10-angstrom technology nodes by 2031.

The existing 3D semiconductor technology mainly used the Through-Silicon Via (TSV) method, which involves penetrating the silicon wafer. However, the TSV method faced several issues, including wafer alignment errors, high processing costs, and chip area loss due to the TSVs. To address these challenges, the research team approached the problem using a 'Monolithic 3D Integration Method,' which directly grows single-crystal transition metal dichalcogenide (TMD) channels without the need for physical connections between wafers. This approach maximizes device performance while minimizing physical connections, thus improving both process efficiency and integration density.

In this study, a low-temperature process below 385°C was applied for the fabrication of the upper single-crystal 2D semiconductor device, instead of the conventional high-temperature process above 700°C. This low-temperature process prevented damage to already fabricated devices or wiring while providing an environment for fabricating the upper device using the 3D monolithic method. Through this approach, the research team successfully integrated a single-crystal n-FET device directly on top of a pre-existing single-crystal p-FET. The developed vertical CMOS device demonstrated more than double the integration density compared to conventional 2D planar CMOS devices, offering a new approach that could replace TSV technology.

Professor Jin-Hong Park stated, "This study represents an example of achieving innovative technological progress beyond existing TSV technology," and added, "The realization of 3D C-FET semiconductor integration technology by directly growing single-crystal devices in a low-temperature process using the monolithic 3D integration method is a significant technological leap in the semiconductor industry." He further mentioned, "This technology is expected to contribute not only to the improvement of integration density in next-generation semiconductor devices but also to maximizing energy efficiency," and added, "In the future, this technology is expected to play an important role in various advanced technology fields, such as artificial intelligence, data centers, and the Internet of Things (IoTs).”

The results of this study were published in Nature on the 18th, and the technology is expected to be a key to overcoming the limitations of Moore's Law through improvements in semiconductor device integration density and innovations in manufacturing processes.

This research (2024-12)

※ Title: Growth-based monolithic 3D integration of single-crystal 2D semiconductors

※ Journal: Nature (IF: 50.5)

※ Link: https://doi.org/10.1038/s41586-024-08236-9

Previous research (2023-2)

※ Title: Non-epitaxial single-crystal 2D material growth by geometric confinement

※ Journal: Nature (IF: 50.5)

※ Link: https://doi.org/10.1038/s41586-022-05524-0

▲ Comparison of Existing 3D Semiconductor Integration Technology and the 3D Semiconductor Integration Technology

▲Diagram of Low-Temperature Growth Technology for Single-Crystal 2D TMD and Single-Crystal 3D C-FET Semiconductor Devices